Ball grid array packages for semiconductor chips have been used extensively in the semiconductor industry. The BGA package utilizes solder balls for establishing electrical interconnections between a chip and a printed circuit board (PCB) and provides a package of high quality and reliability. It has been commonly used in CPU chips in personal computers, in chips of multi-chip modules and in other high I/O chips.
A BGA package can be made more compact in size than other packages, for instance, a plastic quad flat package (PQFP). A BGA package which has an IC chip wirebonded to a substrate can be easily soldered to a printed circuit board by solder balls frequently arranged in an area array. Other benefits can also be achieved by the BGA package, for instance, there are fewer soldering defects in a BGA assembly when compared to the PQFPs and the self-alignment effect of the solder balls. As a result, small misalignments in the mounting position can be automatically corrected by the surface tension of the molten solder during a reflow process.
The BGA package utilizes an area array external electrodes which are normally formed of lead/tin solder balls. The solder balls are placed on a back surface of the package at spacings between about 0.5 mm and about 1.5 mm. The BGA package further supplies higher external pin-count density, larger thermal paths to the package surroundings and improved pre-testability.
A typical BGA package 10 is shown in FIG. 1 in an enlarged, cross-sectional view. The BGA package 10 is constructed by first mounting an IC die 12 to a substrate 14 and then making electrical connections between the two by wirebond 16 which connect chip bond pad and substrate bond finger. The IC die 12 is typically interconnected to a plastic resin molded substrate 14 in a transfer molding process. Solder balls 20 are then attached to the backside 18 of the substrate 14 in a post-molding operation. A plastic molding compound or encapsulant 24 is utilized in the transfer molding process to encapsulate the IC die 12 and the bonding wires 16 with a top surface 22 of the substrate. Inside the substrate 14, thermal via holes 28 are formed to provide shorter and significantly larger thermal paths from the IC die 12 to a mother printed circuit board through the holes 28 and the solder balls 20. In more sophisticated BGA package structures, multi-layer substrate which have broader power planes or ground planes, or both are utilized for low inductance and larger thermal-path connections.
The solder balls 20 can be formed on the bottom side 18 of the substrate by a variety of techniques which include solder-ball attachment and solder-paste screen printing. After the solder balls are formed, a reflow operation usually follows to complete the metallurgical connections.
A plane view of the BGA package substrate is shown in FIG. 2. The substrate 14 is provided with slot openings 26. It should be noted that the top side 22 of the substrate 14 is shown and thus the solder balls 20 are under the substrate 14 and therefore not shown in FIG. 2. The wirebonds 16 connect the die 12 to wirebond fingers and a multiplicity of through holes 30 such that electrical communication can be established with the solder balls 20 located on the opposite side of the substrate 14 when a solder is later filled into the through holes 30. Also shown in FIG. 2 are plating bars 32 which are formed of an electrically conductive metal for providing electrical communication between the substrate conductive traces and the solder ball pads (on the bottom side of the substrate 14, not shown) such that the pads and bond finger 36 can be later electroplated.
FIG. 3 is a plane view of the BGA package substrate 14 of FIG. 2 with the slot openings 26 made to have all substrate traces become electrically insulated after the solder ball pads and bond fingers 36 are electroplated.
In the typical BGA package and substrate shown in FIGS. 1-3, the conductive traces, mostly made of copper, serve as the electrical interconnection between the IC die 12 and the system circuitry. The two ends of the metal traces, i.e. the bond fingers and the solder ball pads (not shown) are exposed in ambient and are not covered by a dielectric layer such as a solder mask applied for surface protection and traces electrical insulation. To protect the exposed surfaces of the metal trace from oxidation, the surfaces are normally plated with Ni/Au. Plating bars 32, 34 connect all the traces and are formed to make the plating process possible. After the plating process is carried out, the plating bars 32, 34 must be removed in order to electrically insulate the conductive traces and the wirebond fingers from each other.
In a thin small BGA package, a substrate 14 is designed in a matrix form to achieve high density packaging. This is shown in FIG. 4. In order to conduct an electroplating process for covering the surfaces of the bond fingers and the solder ball pads with a Ni/Au coating, a plating bar (or a plating bus) 42 is provided in the configuration of a straight line through the boundaries of the plurality of BGA packages 10 such that electroplating of all exposed surfaces of the bond fingers and the solder ball pads is possible. The plating bar 42 which connects all the traces 16 must be removed after the plating process to electrically insulate the traces 16 from each other. The removal of the plating bar 42 is carried out conventionally by sawing with a rotary saw blade at the same time when the BGA packages 10 are singulated from each other.
A rotary saw singulation process is shown in FIG. 5 in a cross-sectional view utilizing a rotary saw 44. It is seen that the rotary saw 44 is equipped with a saw blade 46 to cut through in-between the solder balls 20, the substrate 14 along the plating bar 42 to separate the conductive traces 16. Due to the fabrication limitation of the plating bar 42, as well as the requirement for achieving uniform plating thickness, the plating bar 42 is formed of a minimum width. The rotary saw blade 46 used for package singulation must have a thickness larger than the width of the plating bar 42 in order to completely remove the plating bar from the surface of substrate 14. As a result, a rotary saw blade 46 of a large thickness must be used resulting in difficulty in package dimensional control. A highly accurate rotary saw must also be used for the cutting process and a low throughput resulted due to a necessary slower cutting speed. A further processing difficulty may be caused by an inadequate rotary saw cutting process is the incomplete removal of the plating bar 42 which may lead to electrical shorts between the conductive traces 16. When electrical shorts between the traces or the dies occur, the fabrication yield for the IC dies may be significantly reduced.
It is therefore an object of the present invention to provide a matrix form substrate strip (formed on a substrate) that has an electrode formed in-between a plurality of IC package substrates for an electroplating process which does not have the drawbacks or shortcomings of the conventional matrix form substrate strip.
It is another object of the present invention to provide a matrix form substrate strip that has an electrode situated in-between a plurality of IC package substrate for providing electrical communication to conductive traces situated on the substrate.
It is a further object of the present invention to provide a matrix form substrate strip that has an electrode situated in-between a plurality of IC package substrate for providing electrical communication to a multiplicity of conductive pads and bond fingers situated on the dies during an electroplating process.
It is another further object of the present invention to provide a matrix form substrate strip that has an electrode situated in-between a plurality of IC package substrate wherein the electrode is formed in a serpentine configuration.
It is still another object of the present invention to provide a matrix form substrate strip that has an electrode situated in-between a plurality of IC package substrate wherein the electrode is formed in a corrugated configuration.
It is yet another object of the present invention to provide a matrix form substrate strip that has an electrode situated in-between a plurality of IC package substrate wherein the electrode is formed in a corrugated configuration with each one of two legs of a corrugation electrically connecting an oppositely positioned IC package substrate on either side of the electrode.
It is still another further object of the present invention to provide a matrix form substrate strip that has an electrode situated in-between a plurality of IC package substrate for providing electrical communication to conductive pads during an electroplating process and then removing the electrode completely by a rotary saw blade during a singulation process of the IC package substrate.